RetroBSD

2.11BSD operating system for microcontrollers
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PostPosted: Sat Nov 17, 2012 8:34 am 
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A12 - make a small pad for it somewhere with a 10k pullup..
Data on A0-15 and addresses 4-11 might be routed as you want, I think. On RB you get 4 analog pins available - good.
UDQN, LDQN -?? - they are used with some burst modi.. (and both LOW for our wiring).

RA10 - CKE - ??

BTW - I would recommend strongly to use 0603, maybe the 10u ceramic 0805. LED 0603 as well. Otherwise it will not fit, I guess..

UARTs - pullups on RX, headers with 3v3-gnd-tx-rx
SDcard - pullups (except sclk..)

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PostPosted: Sat Nov 17, 2012 9:40 am 
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Yes, I considered 0805 and smaller components. I bought 10uF 0805 capacitors in bulk and use it almost everywhere. I'm not sure whether using 0603 instead of 0805 components would bring any advantage. There is only a few resistors and few capacitors, so PCB real estate saved with 0603 comps is few square millimeters.

SDRAM data pins are swappable, but I'm not sure about address pins, especially about A10.
My point is to get SDRAM-PIC32 wiring to two neighboring sides of PIC32 TQFP package. Now it is all over the shop, what would make routing difficult.

Usage of PORTA interferes with JTAG.
I would use PORTE as data port, RD as address port (RD0 is probably tied to use as CLK output), leaving a lot of IO pins in area of pins 70-100 to use for other SDRAM control signals. This would leave pins 6-69 free for another applications.

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PostPosted: Sat Nov 17, 2012 9:48 am 
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jaromir wrote:
Yes, I considered 0805 and smaller components. I bought 10uF 0805 capacitors in bulk and use it almost everywhere. I'm not sure whether using 0603 instead of 0805 components would bring any advantage. There is only a few resistors and few capacitors, so PCB real estate saved with 0603 comps is few square millimeters.

I used to use 0805 everywhere - now I find them bulky. I have sold most of my 10KΩ and 100nF 0805's on ebay now - I use 0603 by default everywhere now. Won't be long before I find 0603 bulky and switch to 0402 ;)

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PostPosted: Sat Nov 17, 2012 9:50 am 
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Do we have 16 portE pins? We do need 16 data.
Frankly, do we need jtag here?? This is not a pic32 development board, rather a retrobsd board..

0603 - they are much harder to find when dropped on my tabriz carpet I am using here in my shack, on the other hand they are easier to solder (less hot air needed) ;)

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PostPosted: Sat Nov 17, 2012 9:57 am 
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Pito wrote:
Do we have 16 portE pins? We do need 16 data.
Frankly, do we need jtag here?? This is not a pic32 development board, rather a retrobsd board..

No, only RE0-RE9. For 16 bit data you'd want to use port B, I think it's the only one with all 16 pins available.

And as for JTAG, pfff... Only Wiz uses it afaik, so stuff it ;)

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PostPosted: Sat Nov 17, 2012 10:05 am 
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Pito:
No, we don't have 16 bits of RE pins. As well as we don't have 16 bits RA pins.
In fact, we have only two 16-bit ports - B and D. As i seems we need RD0 for clock output, RB seems to be only candidate, rendering AD peripheral unusable. I wouldn't care that much, but I feel like you do :) Using external ADC is completely OK for me. Wasting few valuable fast IO pins just for AD converter is too luxury for me. It can be done externally - there is truckload of SPI AD converters with much better parameters than onboard 10 bit AD.

Do we need 16 bits data bus, after all? If we do, internal AD converter is probably out of question. If not, memory access would be slower (but still faster than SD card swap), but board would be more universal.

majenko: serge uses it too :)

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PostPosted: Sat Nov 17, 2012 10:25 am 
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What about this:
1. populate all 16 bit data on portB and adresses at portA if applicable
2. break out portB8-15 to a header as well
3. if somebody wants use the b8-15 as ADC, he/she/it may solder in an SDRAM with 8Mx8bits, those have NC at those higher data pins (ie. HY57V658020B) ;)
4. You have to make those LDQM UDQM pins configurable then (a solder bridge).


JTAG - we do not need that yet. The prototype run is an enabler for the SDRAM, to see how it works and whether it is usable in real life. You will certainly do a second run, when it fits in (and I am in doubt) you may place it there. But somebody comes with VGA, etc, so we have to go to 5cmx10cm then..

BTW Itead as of today (excl. postage):
10pcs 5x5cm $9.90
10pcs 10x5cm $22
10pcs 10x10cm $24.90

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PostPosted: Sat Nov 17, 2012 11:24 am 
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Hi Majenko,

J-TAG - Kinda hard to stuff it :). Doesn't fit that well :). LOL.

Wait until you see my patches. All the stuff no-one thinks is needed in one place !!

But my debugger is running well :).

FWIW - J-TAG and cpu clock input access are REQUIRED to recover from some misprogrammings of PIC32. But you can always tack solder on the chip! Get out your bench microscope!

LOL

Wiz


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PostPosted: Sat Nov 17, 2012 11:29 am 
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Principally not bad idea, but I'm not sure if I want to break out SDRAM data pins.
Personally, I would stick to 8-bit solution.
I'll put header for JTAG, if there will be JTAG pins free. I'll do my best to leave them free.

For now, we only need madscifi's advices regarding questions I asked before - what pins/peripherals are critical for SDRAM.

JTAG and clock is not required to recover PIC32. Only thing you need to recoved PIC32 from anything is GND, MCLR, PDG and PGC lines - ie. standard in-circuit programming/debugging pins. I always leave those on separate connector, as a part of normal design practice.

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PostPosted: Sat Nov 17, 2012 11:44 am 
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Hi Jaromir,

Yes, I use it for programming the PIC32.

Wiz


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PostPosted: Sat Nov 17, 2012 11:46 am 
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Hi Jaromir,

Is J-tag needed. Seems to be needed from what I have seen on my early chips.

Maybe Microchip has fixed that bug? Maybe. I hope so. I still use j-tag.

Wiz


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PostPosted: Sat Nov 17, 2012 11:57 am 
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wiz: trust me, JTAG is not required for anything special. It is bonus thing for those, who want it. ICSP/ICD interface on PGC/PGD pins does the same job, except it is supported by much wider range on devtools - PicKit2/3, ICD2/3 and third party programmers.
I don't know about any bug regarding ICSP/ICD interface. There is no way of getting PIC32 into funky state with one programming interface, which would be curable with another programming interface - this is not AVR, the worst MCU family to deal with in known universe :mrgreen:

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PostPosted: Sat Nov 17, 2012 7:02 pm 
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The diagram matches what I currently have working on the breadboard. However, several things could be improved, mainly 16 bit data support (if you are willing to give up the 8 pins) and bit assignments for the address lines.

Requirements (from point of view of the ram to support the driver code):
1) All data pins (DQx) MUST be connected to a single port. The specific bit assignments do not matter except for aesthetics. Actually, MUST is slightly too strong, other arrangements can probably be made to work, but it would probably be ugly and inefficient.
2) All control pins (CS#, RAS#, CAS#, WE#) MUST be connected to a single port.
3) CLK MUST be connected to an OCx pin. OC1 and OC4 have been used successfully. I have not attempted to use any of the others (no reason they should not work).
4) BA0/BA1 SHOULD be connected to two consecutive port pins. They can be on the same port as the Ax pins, but that is not a requirement.
5) Ideally, the Ax pins would be connected to a single port, with the pins mapped to consecutive bits. It is easiest if A0/A1/A2 are connected to the lowest 3 bits (unlike in the earlier schematic). If possible, please keep the bit assignments consecutive. Please do connect A12. Do note that the bit assignments in the earlier diagram are not ideal.

If 8 bit data is used, then A0/A1/A2 can be moved to a different port from the remaining address lines and still have efficient access. If 16 bit data is used, then A0/A1 can be moved to a different port from the remaining address lines and still have efficient access.

If address lines do have to be split up that is not too bad - the bit shuffling only has to occur once at the start of each burst read/write (of 8 bytes).

6) If a 16 bit data interface is used, both LDQN and DQM should be tied low.

Since my breadboard is wire-wrapped, I'll rework it to whatever schematic is made and mod the code accordingly in order to verify that I have not missed anything.


Last edited by madscifi on Sat Nov 17, 2012 7:25 pm, edited 2 times in total.

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PostPosted: Sat Nov 17, 2012 7:20 pm 
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Would it be possible to:
1. draw the new schmatics based on madscifi's and jaromir's best practise
2. to ask madscifi kindly to rewire and check
3. to make the final pcb design after that?

Still there is a Q whether 16 or 8 bits data..

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PostPosted: Sat Nov 17, 2012 7:54 pm 
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madscifi: thanks for summary, it's fantastic.

pito: I'll draw schematics and post it here. I'm still not decided whether to use 16 or 8 data bits, but after a lot of rethinking I'm more inclined to 16 bits.

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PostPosted: Sat Nov 17, 2012 8:56 pm 
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8bit: the ramdisk will be smaller and slower - what does it mean?

Slower - I am running 5/5MB/sec swapdisk, it is MUCH faster to work with when running background jobs (the comparison test showed 6x when running 4 bg jobs), so with 8bit sdram it will be ~3x - still much better and safer than with the sdcard

Smaller - you do not need more than 1MB for swapdisk, till today I do not have any practical use for filesystem on the ramdisk (ie 3MB /tmp).. but of course people here are not motivated to do something with it as they do not have a ramdisk handy..

So maybe the first prototypes shall have 8bit data sdram. If somebody will come with a fantastic usage for 15MB ramdisk filesystem he may invest an hour effort and 10E.

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PostPosted: Sat Nov 17, 2012 10:27 pm 
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Nice colors.
OK, for now we can start with 8 bits. After all, it's SDRAM case study prototype.

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PostPosted: Sat Nov 17, 2012 10:40 pm 
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For testing purposes I was thinking it might be nice to copy the sdcard root partition to sdram on startup and run root off the sdram. That way crashes don't wipe out the sdcard. An overlay filesystem would be even better, but more complicated. There are other use cases that would work well setup that way as well.


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PostPosted: Sat Nov 17, 2012 11:27 pm 
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@madscifi: is for that application the 7MB large enough (root fs on the ramdisk) ??

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PostPosted: Sat Nov 17, 2012 11:49 pm 
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What about this assignment?
I hope it keeps all the rules that madscifi mentioned and allows usage of both x8 and x16 memories, with single 8-bit port. There is possibilty to use all capacity of x16 devices.

For x8 memories, with data IO on DQ0, DQ2, DQ4... etc. this is simple - all DQ pins are connected to RE port.
For x16 memories, low and high part of data bus is connected together, manipulation with LDQM and UDQM pins allows low or high data byte to appear on RE port. This should allow utilization of whole memory in x16 models (though a slower), also permits to use x8 memories, or even x16 memories with half capacity wasted (current mode).

Pins assignment is done with respect to minimal crossing on PCB.


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